STM32L5 based board

aidiaz · 9 June 2021 17:03

Hello guys! Recently I’ve forward to implement a LoRaWAN network based on RIOT-OS. Due to lack of stock we selected a STM32L552CC (48-LQFP) as a CPU candidate for the devices. I’ve been trying to make some examples work, but others seem to resist (periph_rtt and periph_rtc seem to not be working). I tried the porting guide in the documentation but still facing issues.

When running ‘examples/default’ the output in the terminal does this (tried with pyserial and sockets):

Done flashing
socat - open:/dev/ttyUSB0,b115200,echo=0,raw 
main(): This is RIOT! (Version: 2021.04)
Welcome to RIOT!
> main(): This is RIOT! (Version: 2021.04)
shell: command not found: main():
> Welcome to RIOT!
shell: command not found: Welcome
> > main(): This is RIOT! (Version: 2021.04)
shell: command not found: >
> 
> shell: command not foumain(): This is RIOT! (Version: 2021.04)
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> shell: command not foumain(): This is RIOT! (Version: 2021.04)
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Any suggestions? Greetings to all!

aidiaz · 10 June 2021 00:09

I would close this thread since resolved by using a different usb-serial converter (cp2102).

aidiaz · 10 June 2021 00:10

Btw, periph_rtt and periph_rtc still showing issues.

fjmolinas · 10 June 2021 06:55

Hi @aidiaz, I doesn’t seem that we have an STM32L552CC based BOARD in master yet, si I’m guessing you defined your own BOARD, do you mind sharing the BOARD definition? Maybe there is something off there. For periph_rtc and periph_rtt, the BOARD requires an LSE for them to work correctly, not all BOARD have them, so you would need to check that first.

aidiaz · 10 June 2021 15:46

Our board has a LSE for the RTC purpose. This has been tested through STM32CubeIDE, so the clock is working. Is there any fast way to share you the BOARD folder? It seems the problem is there is no implementation of RTC and RTT for CPU_FAM_STM32L5.

benpicco · 10 June 2021 16:36

Indeed, there is no case for CPU_FAM_STM32L5 in cpu/stm32/periph/rtt_all.c. I don’t know how much it will differ from L4, but this might be a simple addition.

aidiaz · 10 June 2021 16:53

I’ve been working through L5 registers and seems to be some differences. Got the files to compile but no response from the peripherals, so no solution from my side

aidiaz · 10 June 2021 23:41

Got tests/periph_rtt to work as expected:

socat - open:/dev/ttyUSB0,b115200,echo=0,raw 
Help: Press s to start test, r to print it is ready
s
START
main(): This is RIOT! (Version: 2021.07-devel-246-gaff6d-clevertek-board)

RIOT RTT low-level driver test
RTT configuration:
RTT_MAX_VALUE: 0x0000ffff
RTT_FREQUENCY: 1024

Testing the tick conversion
Trying to convert 1 to seconds and back
Trying to convert 256 to seconds and back
Trying to convert 65536 to seconds and back
Trying to convert 16777216 to seconds and back
Trying to convert 2147483648 to seconds and back
All ok

Initializing the RTT driver
This test will now display 'Hello' every 5 seconds

RTT now: 1
Setting initial alarm to now + 5 s (5121)
rtt_get_alarm() PASSED
Done setting up the RTT, wait for many Hellos
Hello
Hello
Hello
Hello
Hello
Hello
Hello
Hello
Hello
Hello
Hello
Hello
Hello
Hello
Hello
Hello
Hello
Hello
Hello

tests/periph_rtc still not working!

fjmolinas · 11 June 2021 06:33

Nice! Do you think you could open a PR adding rtt support for the L5 into master? That would be highly appreciated!

benpicco · 11 June 2021 06:50

For tests/periph_rtc you want to adopt cpu/stm32/periph/rtc_all.c

aidiaz · 11 June 2021 14:14

Since I’m not very into github workflow I would need a little insight to add support. How do I proceed?

aidiaz · 11 June 2021 14:22

I am aware of that (did the same for periph_rtt) but the solution didn’t worked. Seems that the RTC implementation of L5 has some slight differences respect L4.

fjmolinas · 11 June 2021 14:35

So the general procedure is described in CONTRIBUTING, If one of the steps is not that clear I can gladly help, let me know!