Question regarding clock initialization sequence at cpu/stm32/periph/i2c_1.c

Could someone explain to me why at function i2c_init (file cpu/stm32/periph/i2c_1.c), the clock is first enabled with periph_clk_en(i2c_config[dev].bus, i2c_config[dev].rcc_mask);, but then later again with I2C_CLOCK_SRC_REG |= i2c_config[dev].rcc_sw_mask ?

And why only for some STM32 families? For example, no G0, G4, U5 and C0.

Without diving into the code myself, I will venture a guess.

It is not uncommon to have to setup the clock going to a peripheral (RCC) as well as the clock signal inside of a peripheral. The RCC is responsible for the clock signal outside of the peripheral itself, but often time peripherals might have registers that select from one of several clock sources, or further dived the clock once inside the peripheral.