we came across the following spec in the linker script
cpu/stm32f1/ldscripts/stm32f103cb.ld:
rom (rx) : ORIGIN = 0x08005000, LENGTH = 128K-0x5000
Is there a specific reason why the ISR vector table is placed at address
0x08005000 instead of 0x08000000 as usual? I found that at least for my
board[1], the address 0x08000000 works while 0x08005000 does not.
“As usual” = as in the other related cpu specs, say, stm32f103c8.ld or stm32f103rb.ld.
Has anyone ever actually tried the cb variant?
I don’t even understand how it could work; those vectors need to be at 0x08000000.
took me some minutes to remember, but the reason is quite simple, though stupid: the stm32f103rb was imported while porting the spark-core board. Now the spark-core is does some hacky things (i.e. some custom bootloader stuff), so it expects the ISR table at addr