Include in Makefile

Hi all,

I'm building an example (let's called it "app") for RIOT with the following structure: app/*.c app/include/*.h app/thingA/*.c app/thingA/include*.h app/thingB/*.c app/thingB/include*.h

How to add the required path in the Makefile? Should I add Makefile.base in each folder or is there another way to do it with RIOT Makefile ? I couldn't find any example of this structure.


Anyone? @OlegHahm , @daniel-k ?


In app/Makefile:

DIRS += thingsA thingsB

INCLUDES += -I$(CURDIR)/thingsA -I$(CURDIR)/thingsB

USEMODULE += thingsA thingsB

in thingsA and thingsB directory add a Makefile:

include $(RIOTBASE)/Makefile.base

Something like that should work … but if there is a better solution nice to know!

greetings Attilio

kaspar, it works if all include are in the root folder otherwise there is linking problem ("undefined reference to" function, error).

Attilio, yes it works thanks, but I think we shouldn't have to create a module for that. Anyway, let's see if someone can provide another solution.


We need to use USEMODULE macro in Makefile, else in case app/.c is making reference to functions defined in app/thingA/.c, it will give undefined reference error.

Thanks and Regards,



Did you try the following?


DIRS += thingA thingB
INCLUDES += -I$(CURDIR)/include -I$(CURDIR)/thingA -I$(CURDIR)/thingB

app/thingA/Makefile, app/thingB/Makefile

module = $(APPLICATION)

include $(RIOTBASE)/Makefile.base

This way all code in `app` should form one module. Let me know if this helps.

Best, Thomas

Thanks Thomas and Rakendra. I didn't try it but it will work as good as Attilio solution expect from the fact that it will use only one module APPLICATION.

Thanks again!